Comparison of on-wafer calibrations using the concept of reference impedance

A novel method that allows to compare different calibration techniques has been developed. It is based on determining the reference impedance of a given Network Analyzer calibration from the reflection coefficient measurement of a physical open circuit. The method has been applied to several on-wafer calibrations.Peer ReviewedPostprint (published version

Diseño de amplificadores de bajo ruido en banda milimétrica

Sin tener en cuenta introducción y conclusiones, la tesis doctoral esta dividida en 6 capítulos. Los dos primeros tratan del ruido eléctrico asociado a los dispositivos activos (transistores Gaas Fet y Hemt) utilizados en los amplificadores, y de su medición. En el capitulo i se propone y desarrolla una formulación del error cometido en las medidas de factor de ruido que utilicen el método del factor y, y se presentan las cotas calculadas para la medida de dos amplificadores, en la banda de 2.6 GHZ y 30 GHZ, respectivamente. En el capitulo II se propone y desarrolla una formulación para la extracción del factor de ruido a partir de medidas no corregidas, cuya finalidad es incrementar la precisión en la medición de este respecto a los métodos convencionales. También se proponen métodos de medida de los parámetros de ruido basados en medidas redundantes del factor de ruido y se presentan resultados experimentales a 2 GHZ. En los capítulos III, IV y v se trata el tema de la medida de los parámetros s de los dispositivos activos (transistores Gaas Fet y Hemt) utilizados en la banda milimétrica (hasta 40 GHZ), poniendo un énfasis especial en el estudio de las técnicas de calibración de analizadores de redes y de los errores de medida. El capitulo III pasa revista de las técnicas de calibración mas utilizadas actualmente, en particular la denominada TRL/Thru-Reflect-Line, que permite medir los parámetros s en medios de transmisión planares (tales como Microstrip y CPW) con elevada precisión. El capitulo IV propone y desarrolla teóricamente una formulación para los errores residuales de la calibración TRL y su repercusión en la precisión de las medidas de parámetros utilizando dicha técnica. En el capitulo v se describen las técnicas de diseño de dispositivos de calibración y medida (test fixtures) en tecnología Microstrip para transistores chip, ente 1 y 43 GHZ. Se presentan resultados experimentales hasta 40 GHZ utilizando dos textosPostprint (published version

Sistema de medida de parametros de ruido de transitores chip en banda Ka

In this paper a full noise paramerers measuremenr sysrem is presenred for chip transistors clwracrerizarion in Ka band. The hardware involved is described jocusing in the elements indeed designed. Some accurate S-paramerers measurement methods are used in arder to obrain rhe required accuracy. Experimental resuts are presemed at 30 GHz.Peer ReviewedPostprint (published version

New Theoretical Analysis of the LRRM Calibration Technique for Vector Network Analyzers

In this paper, a new theoretical analysis of the four-standards line-reflect-reflect-match (LRRM) vector network-analyzer (VNA) calibration technique is presented. As a result, it is shown that the reference-impedance (to which the LRRM calibration is referred) cannot generally be defined whenever nonideal standards are used. Based on this consideration, a new algorithm to determine the on-wafer match standard is proposed that improves the LRRM calibration accuracy. Experimental verification of the new theory and algorithm using on-wafer calibrations up to 40 GHz is given.Peer Reviewe

Circuit Model for mode conversion in coplanar waveguide assymmetric shunt impedances

A new `circuit model' for the conversion between even and odd modes in coplanar waveguide asymmetric shunt impedances is presented. The model is based on the separation of modes into two input and two output ports. In contrast to previous work, it allows a quantitative analysis of the energy exchange between modes.Peer Reviewe

Circuit model for a coplanar-slotline cross

A new 6-port “circuit-model” for coplanar-slotline crosses is presented. The model is based on the separation of the two fundamental Coplanar Waveguide (CPW) modes (even and odd) into different ports. It generalizes previous models since it explains the cross's behavior even if air-bridges are not used and slotlines are loaded asymmetrically. The new model is applied to the analysis of the S-parameters of an asymmetric slotline resonator, and validated through comparison with experimental results up to 40 GHz.Peer Reviewe

Circuit model for coplanar-slotline tees

Coplanar-slotline tees have been used in a number of microwave circuits, although no complete models were available to explain their behavior. In this letter, a new “circuit-model” for a coplanar-slotline tee is presented. The model, based on the separation of coplanar waveguide (CPW) even and odd modes into two different ports, explains the tee's behavior even if CPW air bridges are not used and slotlines are loaded asymmetrically. The new model has been applied to the analysis of the input reflection coefficient of an offset-fed slotline antenna, showing an excellent agreement between simulation and measurement.Peer Reviewe

A 2.4 GHz CMOS class-F power amplifier with reconfigurable load-impedance matching

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.A novel reconfigurable CMOS class-F power amplifier (PA) at 2.4 GHz is proposed in this paper. It is able to match the output load variations mainly due to the effect of hand and head on a mobile phone. The effect of load variation on power-added efficiency (PAE), output power, and distortion is compensated by reconfiguring the output network using an impedance tuner. The tuner controls the output matching at fundamental frequency without affecting the class-F harmonic tuning up to 3rd harmonic. To the best of our knowledge, this is the first design of a CMOS class-F PA addressed to compensate the effect of load variation. Measurement results for 50 ohm load impedance show a maximum PAE of 26% and maximum output power of 19.2 dBm. The measured total harmonic distortion is 4.9%. Measurement results for load values other than 50 ohm show that PAE increases from 6.5% (not-tuned PA) up to 19.9% (tuned PA) with the same output power (19.2 dBm). Tuning also reduces the adjacent-channel leakage ratio by 5 dB and the spectral regrowth of a Wi-Fi signal at the PA output. The size of the fabricated chip is 1.6 mm × 1.6 mm.Peer ReviewedPostprint (author's final draft

A very low distortion high efficiency class-F power amplifier at 900 MHz.

This paper presents a novel class - F power amplifier for mobile applications in which with a proper harmonic tuning structure the need f or an extra fil tering section is eliminated . A class - F power a mplifier employing a GaN HEMT device has been designed, fabricated and measured at 900 MHz . The fabricated circuit achieves a n excel lent harmonic - suppression level and the t otal h armonic distortion is around 1.2% . It overcomes the narrow band performance of class - F power amplifier s, giving more than 70% efficiency over a 100 MHz bandwidth . Experimental results show that the amplifier is able to deliver 38.5 dBm output power while achieving the state - of - the - art PAE of 8 0.5 % with a peak drain eff iciency of 8 4 % , and a power gain of 13.6 dB for an input power of 25 dBm . A good agreement between measurement and simulation results is observed for the proposed structure.Peer ReviewedPostprint (published version

Generalized transverse resonance analysis of planar discontinuities considering the edge effect

Mode-matching related techniques such as the Generalized Transverse Resonance Method (GTR) suffer from the relative convergence phenomenon. To reduce its influence, we present a technique consisting of the application of basis functions incorporating the singular behavior of fields at edges and an optimal modal ratio. We present the results obtained analyzing a uniform finline and a short-circuited finline which demonstrate the minimization of the relative convergence phenomenon, allowing a fast and accurate analysis on a low-cost personal computer.Peer Reviewe